FPGA Engineer

Calligo Technologiesis a Bangalore-INDIA based start-up focused on development of products and solutions serving HPC, Big Data and AI/ML segments to global marquee enterprises. Established in 2012 , focused in HPC/AI & Big Data from 2014 onwards.

The leadership team comes with collective experience of more than 100+ years with wide exposure to Compute, Storage and Semiconductor Industry. This has thus enabled them to look at the needs of the Compute & Storage industry comprehensively.

Calligo has been focused on developing Products and Solutions that are oriented towards the HPC , AI & Big Data solution for multiple industry segments. Calligo strongly believes in the future of HPC as it is a critical pain point to be solved for large computational needs. The need for real time analysis

/ extraction of information on life threatening situations or to enlighten the leadership on analysis that would be a game changer in their business pushes the spectrum of the compute infrastructure to its extreme limits, eventually these infrastructures tend to become bottle necks limiting the compute ability in the state of consternation.

To address these limitations and overcome the pain point, the products and solutions from Calligo have been developed and implemented to industries/enterprises as they have been delivered with significant higher levels of result achievements & satisfaction.

These products and solutions are;

On the Software side

• CIDAP – Calligo Intelligent Data Analytics Platform
• CUSP – Calligo Unified Service Platform
• FaaS – Accelerated Computing
• Edge Analytics – Applied as Health Engine

CIDAP – Calligo Intelligent Data Analytics Platform

We assist those clients who want to – take the lead; be innovative; have a real impact; develop and execute new ideas; adopt leading methodologies; improve performance. We deploy a delicate combination of consulting experience, the latest data science and predictive analytics to help our clients reach their ultimate goals. We help the transformation to a data driven organization where advanced models are combined with strategic advice.

CUSP – Calligo Unified Service Platform

CUSP (Calligo Unified Service Platform) provides easy-to-use access to compute and data resources,

allowing users to launch jobs, orchestrate complex workflows, and manage data from their browsers.

FaaS – Accelerated Computing

FPGA-as-a-Service (FaaS) provides tools and environment for you to develop and use FPGAs. With FaaS, you can easily develop FPGA accelerators, deploy FPGA-based services, and provide simple- to-use, cost-effective FPGA cloud services.

On the hardware side

CRISP – Calligo RISC-V with POSITs

We believe that POSIT is a game-changing, disruptive invention. At the grass-root levels it has the potential of creating new Standards for computing in the key verticals of Data Analytics, Cognitive Computing, AI/ML, Security, Robotics, Computer Vision, Advanced Manufacturing, Finance, Autonomous Vehicles, ADAS, AR/VR, etc.

CalligoTech is developing a co-processor capable of doing computations using the Posit Number System (PNS). We have integrated coprocessor with a RISC-V Processor creating a highly power- efficient, and computationally more accurate CPU core. We like to call it CRISP-core (Calligo RISc- v with Posit).

Complementing this hardware, CalligoTech modified RISC-V C/C+ compilers to generate Posit- enabled executables, without need for any source-level changes. Enabling Linux OS booting, compilation and running of C/C++ applications with posit-enabled executables. It was demonstrated at many international events; RISC-V Event (June 2019), Switzerland, HiPC Conference (Dec 2019), Hyderabad and at VLSID Conference (Jan 2020), Bangalore.

With a fully validated CRISP-core, Calligo Technologies proposes to design and tape-out a ‘Multi CRISP-core CPU’ (a System-on-Chip) to power accelerator boards, targeting HPC and AI segments, enabling commercialization of the product for worldwide adoption of Posit-enabled Computing.

JD:FPGA Engineer

SummaryFPGA Engineer – FPGA Board Experience

• Strong understanding of Digital Design Concepts, Timing and FPGA Architecture
• Experience in partitioning and mapping of the given RTL to FPGA
• Integrate and build designs using IPs provided by FPGA vendor
• Good knowledge of module/system level Verification using simulators supported by FPGA tools
• Ability to Generate Bitstream for a given design, program the FPGA and test the design on FPGA
• Experience in use of FPGA Software from Intel(Altera) and/or AMD(Xilinx)
• Sound knowledge of industry standard protocols like PCIe Gen3 / Gen4, DDR3/4, bus protocols such as AXI, AHB and APB
• Preferable – familiarity with RISC-V Architecture and Instruction Set
• Hands on experience in writing Test Plans, test cases ,developing verification requirements

,Verification plan at module/system level

• Ability to rapidly learn new concepts with excellent interpersonal and problem solving skills.

Minimum Qualification - BE E&C or E&E

FPGA
C
C++
Perl
FPGA
C
C++
Perl