DFT Staff Engineer

Qcom

Aussicht: 106

Update Tag: 03-06-2024

Ort: Bengaluru / Bangalore Karnataka

Kategorie: Elektrik / Elektronik Produktion / Betrieb

Industrie:

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Jobinhalt

Company:
Qualcomm India Private Limited
Job Area:
Engineering Group, Engineering Group > Hardware Engineering
General Summary
As a person hired into this role you will be Define, Develop and Deploy DFT CAD Solutions in the area of Memory BIST Solutions for leading edge SoCs on advanced Technology nodes. We believe in fast paced
development, Innovation and partnership across teams and sites to deliver CAD Solutions to enable Best In Class Chipsets for a Connected world.

You will design, develop, deploy and support innovative Products, Methodology and Flows to enable efficient and high quality implementation to meet challenging goals of Low DPPM with and test cost
optimization. Should be Proficient in DFT Methodology Development using EDA Solutions from Synopsys SMS and/or Siemens EDA Tessent MBIST solutions. Should have experience in Memory Test Architecture, MBIST insertion, validation and Si bringup. Solutions developed should stringent needs for high volume manufacturing while utilizing industry standards.

Implementation, integration and verification of DFT Solutions for block/IP level and chip level while minimizing schedule, timing, area, and power is a key challenge.

Should be able to drive multiple aspects of Solution development including working EDA Vendors on Evaluations, flow Validation, Deployment and Support of CAD solutions across Design teams including
Cores and SoC teams across Business units.

Create flows/methods while collaborating with stakeholders across domains like Physical Design teams, Silicon Test and Product Engineering Teams. Enable automation to generate production quality manufacturing test patterns, and assist with bring-up and debug on Automated Test Equipment (ATE). Providing tool and flow training to design engineers Evaluate and Qualify DFT tools and Working with EDA vendors on resolution of tool and flow issues

Qualifications

Masters degree in Engineering with 8+ years of work experience in the area of DFT CAD Development in the Area of Memory BIST.
Experience with Flow and Methodology Development using EDA Solutions from Synopsys SMS Solution and/or Siemens EDA Tessent MBIST Solutions.
Flows and Methodology Developed should enable efficient RTL Level MBIST Implementation Integration and Validation
Solutions developed should enable efficient Silicon Bringup and meet Volume Diagnostics
Ability to learn and adapt to new tools and methodologies.
Excellent problem solving skills & communication skills to work as part of Global Team
Ability to multi-task & work on several high priority projects in parallel
Working Knowledge of Equivalence check, DFT DRC checking with Tools like VCStatic or Spyglass is a plus.
As a person hired into this role you will be Define, Develop and Deploy DFT CAD Solutions in the area of Memory BIST Solutions for leading edge SoCs on advanced Technology nodes. We believe in fast paced
development, Innovation and partnership across teams and sites to deliver CAD Solutions to enable Best In Class Chipsets for a Connected world.

You will design, develop, deploy and support innovative Products, Methodology and Flows to enable efficient and high quality implementation to meet challenging goals of Low DPPM with and test cost
optimization. Should be Proficient in DFT Methodology Development using EDA Solutions from Synopsys SMS and/or Siemens EDA Tessent MBIST solutions. Should have experience in Memory Test Architecture, MBIST insertion, validation and Si bringup. Solutions developed should stringent needs for high volume manufacturing while utilizing industry standards.
Implementation, integration and verification of DFT Solutions for block/IP level and chip level while minimizing schedule, timing, area, and power is a key challenge.
Should be able to drive multiple aspects of Solution development including working EDA Vendors on Evaluations, flow Validation, Deployment and Support of CAD solutions across Design teams including
Cores and SoC teams across Business units.
Create flows/methods while collaborating with stakeholders across domains like Physical Design teams, Silicon Test and Product Engineering Teams. Enable automation to generate production quality manufacturing test patterns, and assist with bring-up and debug on Automated Test Equipment (ATE). Providing tool and flow training to design engineers Evaluate and Qualify DFT tools and Working with EDA vendors on resolution of tool and flow issues

Qualifications

Masters degree in Engineering with 8+ years of work experience in the area of DFT CAD Development in the Area of Memory BIST.
Experience with Flow and Methodology Development using EDA Solutions from Synopsys SMS Solution and/or Siemens EDA Tessent MBIST Solutions.
Flows and Methodology Developed should enable efficient RTL Level MBIST Implementation Integration and Validation
Solutions developed should enable efficient Silicon Bringup and meet Volume Diagnostics
Ability to learn and adapt to new tools and methodologies.
Excellent problem solving skills & communication skills to work as part of Global Team
Ability to multi-task & work on several high priority projects in parallel
Working Knowledge of Equivalence check, DFT DRC checking with Tools like VCStatic or Spyglass is a plus.
Minimum Qualifications
Education:
Bachelors - Computer Science, Bachelors - Engineering, Bachelors - Information Systems
Work Experiences:
5+ years Hardware Engineering experience or related work experience.
Certifications:
Skills:
Preferred Qualifications
Education:
Masters - Computer Science, Masters - Engineering, Masters - Information Systems
Work Experiences:
1+ years in a technical leadership role with or without direct reports. ,2+ years experience with hardware design and measurement instruments such as oscilloscopes, spectrum analyzers, RF tools, etc. ,2+ years experience utilizing schematic capture and circuit simulation software. ,2+ years experience with circuit design (e.g., digital, analog, RF). ,8+ years Hardware Engineering experience or related work experience.
Certifications:
Skills:
Computer Science, DSP Architectures, Electrical Engineering, Optical Systems, Packaging Systems
Applicants: If you need an accommodation, during the application/hiring process, you may request an accommodation by sending email to
accommodationsupport
To all Staffing and Recruiting Agencies: Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications.
If you would like more information about this role, please contact
Qualcomm Careers
.
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Frist: 18-07-2024

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