Verification Engineer - Verilog/System Verilog

☞ AI Product Based company

Aussicht: 101

Update Tag: 06-05-2024

Ort: Hyderabad / Secunderabad Telangana

Kategorie: Qualitätssicherung / Qualitätskontrolle

Industrie: Information Technology Services Computer Software Internet

Position: Entry level

Jobtyp: Full-time

Gehalt: View Detail

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Jobinhalt

Job Description

:Opportunity : Hyderabad location - VLSI Product based company Job Details :- The successful candidate will have the unique opportunity:- To learn and exercise their verification skills on cutting edge designs using the latest verification tools and methodologies.- Developing Test bench specification and creating test plans- Verification using modern techniques such as UVM and FormalYou will :- Review design specifications, assist developing the verification strategy and test plan- Assist development of constrained random Verification Environments- Write tests, sequences, functional coverage, assertions and mapping these to Verification plan- Perform functional verification of the design to achieve verification goals- Assist in ensuring the IP meets the highest verification standards prior to the delivery to our customers.You have :- An excellent academic record.- An excellent understanding of Digital Electronics fundamentals.- Understanding of Verilog, System Verilog and C++/systemC languages.- Good understanding of Simulators, debugging and Front-End flow- Excellent communication skillsYou might also have :- Knowledge of UVM methodology.- Experience / knowledge of AMBA AXI4/ACE protocols.- Knowledge of scripting language/s like Perl or Python.Working Environment : You will be working in small teams of engineers with a wide range of experience levels.Qualifications :- B.Tech/B.E./M.E./M.Tech with throughout first class in electronic engineering or a related stream- Until good is better and better is best (ref:hirist.com)
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Frist: 20-06-2024

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