Deep Learning RnD Engineer - SI/PI

☞ Intel

Ver: 102

Día de actualización: 06-05-2024

Ubicación: Bengaluru / Bangalore Karnataka

Categoría: Eléctrica / Electrónica Mecánica / Técnica IT - Hardware / Redes Tecnologías de la información

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Contenido de trabajo

Job Description
Senior Power/Signal Integrity engineering positions available at AI/Datacenter Platform Groups - DPG, Intel India. Top expertise in AC and DC Signal and Power Integrity analysis, simulations, and measurements is a must. Should be well versed in time domain and frequency domain analysis. Proven record in enabling Power Integrity solution for high power and high-speed rail. Excellence in setting up and running simulations in Cadence PowerSI, PowerDC, OptimizePI, or equivalent Ansys Tools like SIwave. Knowledge and understanding of how power integrity on die, package, and board affect bit error rate of serial and parallel interfaces, such as high-speed serial channels i.e., 56G/112G PAM4 and beyond, PCIe Gen4/5/6, etc. and DDR4/DDR5 memories are needed. A basic understanding of cross domains like Package, System, Silicon engineering, IO Protocols is an added advantage. Familiarity with 3D EM tools like HFSS, Clarity, CST etc is needed. Working knowledge of statistical analysis like DOE will be an added advantage. Excellent communicator, specifically interfacing with hyper scale data center customers and in-house Si teams. In this position, you will be responsible for providing package and platform power integrity solutions for Intel datacenter/AI products. Your responsibilities will include but not be limited to: � Performs comprehensive simulations and validations to generate Intel design guidelines to guide system-level power integrity design including, but not limited to, Silicon, package, socket, boards, and voltage regulators. � Performs AC and transient simulation to provide impedance profile of the whole power delivery path, from the VR to the motherboard, the package and the die. � Perform time domain analysis in HSPICE, ADS to find noise levels in I/O rails. � Provides guidance to the design team on capacitor numbers and values and power plane shape and width. � Correlating simulations with system measurements. � Deliver optimized PI solution meeting the product performance � Provides DC and resistance simulation to provide Rpath from the VR to the package pins, voltage drop, current density and power loss analysis. � Performs transfer impedance simulations to provide plane split and isolation guidance between interfaces on board package area.


Qualifications

� Candidate must possess a bachelors degree or higher in Electrical or Electronic Engineering or Ph.D. in a power integrity engineering related area. � 10-12 years of experience in Silicon, package and board level power integrity design. � Solid understanding of theory on power integrity as well as having applied it to actual designs in the industry or in the academy. � Knowledge and understanding of how power integrity on die, package, and board affect bit error rate of serial and parallel interfaces, such as high-speed serial channels i.e., 56G/112G PAM4 and beyond, PCIe Gen4/5/6, etc. and DDR4/DDR5 memories. � Power Integrity simulation software use such as Sigrity PowerSI, PowerDC, HSpice and Matlab. � Package/board routing CAD tools such as Cadence Allegro and Mentor Graphics. � Hands-on experience with lab equipment for correlation � Working knowledge of board-level system architecture, basic silicon design and package � Knowledge in PCB layout process and methodology. � Ability to clearly communicate routing rules to layout designers and work with them for successful project release. � Ability to communicate effectively across multiple disciplines, such as silicon design, package design, board design, PCB layout, and mechanical design. � Great team player, willing to learn and flexible. � Solid verbal and written communication skills are required. � Ability to work effectively in a dynamic team environment.

Inside this Business Group


The Data Center Group (DCG) is at the heart of Intel’s transformation from a PC company to a company that runs the cloud and billions of smart, connected computing devices. The data center is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologies—spanning software, processors, storage, I/O, and networking solutions—that fuel cloud, communications, enterprise, and government data centers around the world.


Legal Disclaimer:

Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.

It has come to our notice that some people have received fake job interview letters ostensibly issued by Intel, inviting them to attend interviews in Intel’s offices for various positions and further requiring them to deposit money to be eligible for the interviews. We wish to bring to your notice that these letters are not issued by Intel or any of its authorized representatives. Hiring at Intel is based purely on merit and Intel does not ask or require candidates to deposit any money. We would urge people interested in working for Intel, to apply directly at www.jobs.intel.comand not fall prey to unscrupulous elements.

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Plazo: 20-06-2024

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