Engineer - Scribe Design Verification (Automation)

☞ Micron Technology - HQ

Ver: 103

Día de actualización: 06-05-2024

Ubicación: Hyderabad / Secunderabad Telangana

Categoría: Arquitectura / Diseño de Interiores Eléctrica / Electrónica Mecánica / Técnica Farmacéutica / Química / Biotecnología Mantenimiento

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Contenido de trabajo

Micron Technology - HQ

Engineer - Scribe Design Verification (Automation)

Hyderabad
Full time
Industry
Computer Hardware
Date posted
May 31, 2021
Starting Date
May 25, 2021
Preferred Skills
Python
Information Technology (IT)
Perl
Adaptablility
Verbal Communication
Written Communication
Time Management
Working Under Pressure
Field of Education

Electrical & Electronic Engineering

Level of Education

Bachelors, Masters

Micron Technology - HQ
Micron Technology, Inc. is an American global corporation based in Boise, Idaho. The company produces many forms of semiconductor devices, including dynamic random-access memory, flash memory, and solid-state drives. Its consumer products are marketed under the brands Crucial and Ballistix. Micron and Intel together created IM Flash Technologies, which produces NAND flash memory.
What you’ll do
Identify and initiate physical verification features in early design phase by developing deep understanding of process technology, top level and module scribe design architecture. Develop and maintain automation solutions for scribe design specific simulation and physical verification methodologies. Develop circuit design, layout, simulation and physical verification flows/methodologies. Collaborate with Process Integration, CAD and PDK teams to mitigate physical verification rule deck issues. Partner in development of validation methodologies for physical verification and circuit simulation flows. Implement automation scripts in Calibre SVRF/TVF, SKILL, Perl, Python, Bash and C-shell. Advance and maintain test cases for evaluating PDK updates in IC design flow.
What we’re looking for
Master’s or higher degree in Electrical/Electronics Engineering or related field. 3 plus years of relevant experience in the fields of IC design flow development, Memory/Mixed-Signal Design and Layout. Familiarity with LVS, DRC, PEX rule deck coding using Calibre SVRF/TVF. Understanding of front/back end analog and mixed signal design flows and methodologies. Experience in automation of IC design flows using SKILL, Perl, Python, Bash, C-Schell coding. Knowledge of spice simulators such as HSPICE and Finesim. Hands on experience with schematic entry, netlist extraction, and post layout verification. Familiarity with semiconductor electrical fundamentals and device physics. Capable of working in a cross functional and multi-site team environment spanning multiple time Knowledge in the area of machine learning algorithms and methodologies. Experience in maintaining intranet portals such as confluence and sharepoint.
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Plazo: 20-06-2024

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