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pSemi Corporation is a Murata company driving semiconductor integration. pSemi builds on Peregrine Semiconductor’s 30-year legacy of technology advancements and strong IP portfolio but with a new mission—to enhance Murata’s world-class capabilities with high-performance semiconductors. With a strong foundation in RF integration, pSemi’s product portfolio now spans power management, connected sensors, optical transceivers, antenna tuning and RF frontends. These intelligent and efficient semiconductors enable advanced modules for smartphones, base stations, personal computers, electric vehicles, data centers, IoT devices and healthcare. From headquarters in San Diego and offices around the world, pSemi’s team explores new ways to make electronics for the connected world smaller, thinner, faster and better.

Job Summary

The Senior Layout Engineer is responsible for the physical layout of pSemi’s handset, wireless infrastructure, and broadband integrated circuits. Product lines include a broad variety of functions, including multi-throw RF switches, digital step attenuators, mixers, amplifiers, prescalers, DC-DC converters and PLLs. The candidate will be a key contributor to our growing product portfolio based on pSemi’s proprietary UltraCMOS™ process technology. The Seniour Layout Engineer will work closely with global design teams in pSemi. This position is located in our India Design Center in Chennai, India.


Roles & Responsibilities

This position has responsibility for:

  • Complex Cell & Block level layout
  • Floor planning & die size estimation
  • Physical Verification (DRC/LVS/ANT)
    • Cadence PVS – DRC/ANT
    • Assura – LVS
  • Data prep (Slotting & Dummy Fill)
  • Mentor junior level layout and peers

Competency Requirements

In order to perform the job successfully, an individual should demonstrate the following competencies:

  • Critical Thinking: Skilled at finding logical flaws in arguments and plans; identifies problems and solutions that others might miss; provides detailed insight and constructive criticism into problems and complex situations
  • Working with Ambiguity: Achieves forward progress in the face of poorly defined situations and/or unclear goals; able to work effectively with limited or partial information
  • Serving Customers: Builds strong relationships with customers; stays aware of customer needs, concerns and satisfaction; responds promptly to customer questions and requests; effectively manages customer expectations
  • Adapting to Change: Maintains a positive attitude in the face of change; appropriately adjusts behavior and activities to changing conditions
  • Delivering High Quality Work: Critically reviews work processes to ensure quality; addresses problems that could impact quality; makes sure project deliverables and services meet all requirements and expectations; does not make the same mistakes twice

Minimum Qualifications (Experience and Skills)

  • 6 years of relevant experience
  • Experience with custom RF or Analog IC Layout
  • Knowledge of IC fabrication process and how this impacts physical implementations
  • Experience with top-down physical design techniques
  • Experience with Linux/UNIX OS
  • Understanding of Schematic structures such as:
    • Simple Op-Amp
    • Current Source or Sink
    • Cascoded devices
    • Diode Connected devices

Preferred Qualifications

  • Experience with SOI technologies is a plus
  • Excellent written and verbal communication skills and English proficiency
  • Self-motivated and team oriented with a strong sense of urgency to meet product schedules

Education Requirements

  • Bachelor’s in electrical engineering preferred

Work Environment

This job operates in a professional office environment. This role routinely uses standard office equipment.


Physical Demands

Physical demands although light in nature are required for the office environment. These abilities include sitting for long hours, good vision to interpret the CAD design drawings, sporadically work long shifts greater than 10 hours. Possibility of light travel (locally or long distance) to collaborate face to face with design peers.


The physical demands described here are representative of those that must be met by an employee to successfully perform the essential functions of this job. While performing the duties of this job, the employee is regularly required to talk or hear. The employee frequently is required to stand; walk; use hands to finger, handle or feel; and reach with hands and arms. Specific vision abilities required by this job include close vision, distance vision, color vision, peripheral vision, depth perception and ability to adjust focus. This position requires the ability to occasionally lift office products and supplies, up to 20 pounds.


pSemi Corporation supports a diverse workforce and is committed to a policy of equal employment opportunity for applicants and employees. pSemi does not discriminate on the basis of age, race, color, religion (including religious dress and grooming practices), sex/gender (including pregnancy, childbirth, or related medical conditions or breastfeeding), gender identity, gender expression, genetic information, national origin (including language use restrictions and possession of a driver’s license issued under Vehicle Code section 12801.9), ancestry, physical or mental disability, legally-protected medical condition, military or veteran status (including “protected veterans” under applicable affirmative action laws), marital status, sexual orientation, or any other basis protected by local, state or federal laws applicable to the Company. pSemi also prohibits discrimination based on the perception that an employee or applicant has any of those characteristics, or is associated with a person who has or is perceived as having any of those characteristics.

Note: The Peregrine Semiconductor name, Peregrine Semiconductor logo and UltraCMOS are registered trademarks and the pSemi name, pSemi logo, HaRP and DuNE are trademarks of pSemi Corporation in the U.S. and other countries. All other trademarks are the property of their respective companies. pSemi products are protected under one or more of the following U.S. Patents: http://patents.psemi.com

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Deadline: 20-06-2024

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