Std Cell Libraries RTL and .lib Modelling Design Engineer

As an integral part of Intel, we are establishing Intel Foundry Services (IFS), a fully vertical, standalone foundry business. IFS will be a world-class foundry business and major provider of US and European-based capacity to serve customers globally. Intel Foundry Services will be differentiated from other Foundry offerings with a combination of leading-edge packaging and process technology, committed capacity in the US and Europe - available for customers globally - and a world-class IP portfolio that customers can chose from including x86 cores, graphics, media, display, AI, interconnect, fabric and other critical foundational IP, along with ARM and RISC-V ecosystem IPs. IFS will also provide access to silicon design services to help our customers seamlessly turn silicon into solutions, using industry standard design packages. This business unit is completely dedicated to the success of its customers with full P and L responsibilities. This model will ensure that our foundry customers’ products will receive our utmost focus in terms of service, technology enablement and capacity commitments. IFS is already engaged with customers today starting with our existing foundry offerings and we are expanding imminently to include our most advanced technologies, which are optimized for cutting-edge performance, making them ideal for high-performance applications.

Role

a. The candidate should have strong knowledge of either Verilog / VHDL for Std cells libraries OR .libs / timing / power / noise characterization of Std cells libraries.
b. In-depth knowledge in functionality of CMOS combinatorial logic and sequential circuit and layout, and standard cell modeling, extraction and characterization.
c. Experience in EDA tool/flow/methodology, product and IP developments.
d. Knowledge of scripting language is mandatory.
e. The candidate needs to have strong communication and interpersonal skills to champion initiatives internally and externally.
f. The candidate needs to possess Technical, analytical and cross-functional collaboration skills.
g. The responsibilities will include design, development, verification and support of Std cells libraries RTL / FE models on Intel tech nodes e.g. 22nm, 16nm, 7nm, 4nm etc. for variety of library flavours .

Qualifications

a. The candidate should have B.Tech or M.Tech in Electronics/Electrical/VLSI Design Engineering
b. Minimum of 5-12 years of experience in Std cells library circuit, characterization, verification, design and development

As the world’s largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art - from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth

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