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工作内容

Job Description
The responsibilities will be tailored to the candidate’s skills and expertise and will include several of the following, but not be limited to:
Ensuring the logic design meets the architectural specifications
Ability to do logic integration
Perform and debug quality checks on the integrated RTL
Analyzing micro-architectural features to identify possible problem areas.
Must have a BS or MS in Electrical Engineering, Computer Engineering, or Computer Science or related degree with working experience, and:
Experience in SOC Logic / RTL integration
Ability to understand and spec uarch


Qualifications


Strong background in computer architecture
Strong analytical ability, problem solving and communication skills
Ability to work independently and at various levels of abstraction
Familiarity with a range of internal and 3rd-party logic design tools - SGlint, SGCDC, DC synthesis
Strong communication and team work skills.


Inside this Business Group


The Design Engineering Group is a worldwide team responsible for the design, development, validation, and manufacturing of IPs and SOCs. Our mission is to deliver leadership products through groundbreaking innovations.


Legal Disclaimer:

Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.

It has come to our notice that some people have received fake job interview letters ostensibly issued by Intel, inviting them to attend interviews in Intel’s offices for various positions and further requiring them to deposit money to be eligible for the interviews. We wish to bring to your notice that these letters are not issued by Intel or any of its authorized representatives. Hiring at Intel is based purely on merit and Intel does not ask or require candidates to deposit any money. We would urge people interested in working for Intel, to apply directly at www.jobs.intel.comand not fall prey to unscrupulous elements.

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最后期限: 20-06-2024

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