Fill QA Engineer

☞ Intel

View: 102

Update day: 06-05-2024

Location: Bengaluru / Bangalore Karnataka

Category: High Technology Electrical / Electronics Houseware Production / Operation

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Job content

Job Description


Physical Design Verification Fill Quality Checks is the primary job function.
Good understanding of Fill QA concepts with hands-on on fill insertion along with runsets concept clarity is a must.
Debug the DRCLVS rule deck failures during regressions and document the failures to the development team.
Understanding of calibre svrf is an additional requirement.
Good understanding of Virtuoso and Cadence SKILL scripting is required.
Automation of central regression system and maintain/manage test bench is the crucial job function.
Validating the Fill runsets with after Fill insertions and debugging the issues will be the work nature on daily basis .


Qualifications


B Tech 6 yrs experience or MS 4 yrs in Electrical Electronic engineering is required
Experience with ICV and Calibre Layout verification runsets along with tools like CalibreDRV background is a must.
Experience working on 7nm or lower process nodes desired
Strong automation/scripting skills are required Tcl, Python,Perl
Desire to grow in the physical verification design career path is preferred.

Inside this Business Group


As the world’s largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art - from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth


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Deadline: 20-06-2024

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