Physical Design Manager

About TI
Texas Instruments Incorporated (TI) is a global semiconductor design and manufacturing company that develops analog ICs and embedded processors. By employing the world’s brightest minds, TI creates innovations that shape the future of technology. TI is helping about 100,000 customers transform the future, today. We’re committed to building a better future – from the responsible manufacturing of our semiconductors, to caring for our employees, to giving back inside our communities and developing great minds. Put your talent to work with us – change the world, love your job!

Why ASC?

The Analog Signal Chain team designs and develops more than 30,000 products for the industrial, automotive, personal electronics and communications markets that condition, amplify and convert signals into digital data to be processed by other semiconductors. When you like a photo on social media, you’re using ASC’s signal conditioning technology. When you’re at the grocery store, ASC’s sensors ensure your produce is delivered at the optimum temperature. Made up of six dynamic business units and 20+ product lines across 11 sites, ASC is at the forefront of industry trends. Join ASC for the opportunity to create innovative and compelling products for customers that then help create a better world.

What will you be doing in this role? (Responsibilities)

We are looking for motivated and experienced Senior Physical Design manager to join a cutting-edge team driving the development of next generation SerDes PHY (FPD-Link) for state-of-the-art Self-driving, Autonomous Vehicles, and networking products. You will be working independently on the entire flow from RTL to GDSII .. This position provides a unique opportunity to work on leading edge FPD-Link™ serializers and deserializers for a variety of video interfaces across automotive systems, including cameras for advanced driver assistance systems (ADAS) and infotainment displays. We are looking for a motivated individual to join a cutting-edge team driving the development of next generation SerDes PHY for state-of-the-art Self-driving, Autonomous Vehicles, and networking products.

• Understand the design, clock architecture, reset architecture, DFT architecture and influence them as per Physical Design needs.
• Responsible for development of constraints for Synthesis, STA.
• Methodologies to keep the PD cycle efficient and predictable.
• Techniques to reduce Power and Area to make the device competitive
• Techniques used in automotive designs.
• Ability to interface with Fab and Qualification teams.

For information on FPD link, please refer to the below link:

https://www.ti.com/interface/high-speed-serdes/fpd-link-serdes/overview.html

What do we expect from you?

• Bachelor or Master’s degree in Electrical engineering.
• 6-12 years design experience
• Understanding of DFT architectures
• Good understanding and mastery in PD flow using Cadence tools.
• Knowledge of design requirements and guidelines for automotive applications and associated analog DFT hooks is a desirable
• High speed (Multi Gig)
• Understanding of backend flows like place and route and timing closure.

Preferred Skills/ Experience

• Experienced with IC design and full development cycle from definition through release to production.
• Effective communication skills to interact with all stakeholders.
• Team and People Skills: The candidate should have good people skills to work closely with the systems, analog, layout and test team
• Must be highly focused and remain committed to obtaining closure on project goals